Google is reportedly working on a novel AI chip that integrates the Gemini model architecture directly into the silicon, aiming to boost power efficiency and reduce latency by hardwiring the neural network design.
- Frozen v2 hardwires Gemini’s AI model architecture into silicon for greater efficiency
- Expected to deliver 6 to 10 times power efficiency improvement over current custom chips
- Development targets launch by 2028 amid Google’s internal AI capacity challenges
What happened
Google is reportedly developing an AI chip where the architecture of its Gemini model is embedded directly into the hardware, a project informally called 'Frozen v2.' Unlike conventional general-purpose AI chips that load models into memory and run them dynamically, this chip would have the neural network’s blueprint fixed in the silicon, allowing only the model weights to be updated.
The innovation aims to improve efficiency significantly, with reports suggesting the chip could operate 6 to 10 times more efficiently than Google’s existing custom AI processors, measured by tokens processed per unit of power. The project remains unconfirmed officially from Google and is expected to reach deployment no earlier than 2028.
Why it matters
This chip design represents a strategic response to Google's AI infrastructure demands, as its existing resources face capacity constraints severe enough to impact external customers. Efficiency remains critical because AI workloads are costly at data center scale, and reducing power usage translates directly into financial savings.
Besides cost savings, embedding the Gemini model into hardware promises reduced latency, supporting real-time AI applications such as voice assistants where delays undermine user experience. The project also marks a further push by Google to increase self-reliance in AI chip manufacturing, complementing its existing TPU efforts and diversification of suppliers.
What to watch next
Google’s Frozen v2 chip project should be monitored for technical progress and any official confirmation or product announcements. The tight integration between model architecture and hardware presents risks, as AI models evolve rapidly and a fixed design might become outdated, potentially limiting adaptability.
Industry observers should also watch competitors and startups pursuing similar approaches, such as Taalas’s Hardcore chip, which hardwires AI models for speed and efficiency. The trend toward embedding specific AI models in silicon may shape the future of AI hardware design, forcing companies to balance flexibility with performance and power benefits.