At the IEEE International Symposium in Shanghai, Huawei revealed the Tau Scaling Law, a design philosophy prioritizing signal-propagation time reduction over transistor miniaturization, aiming to maintain chip performance without relying on advanced manufacturing tools restricted by US sanctions.
- Tau Scaling Law redefines chip design focusing on signal-propagation time.
- Huawei aims for 1.4-nanometer transistor density by 2031 without EUV lithography.
- First Kirin chips using LogicFolding architecture expected in autumn 2026.
What happened
Huawei’s semiconductor division, led by He Tingbo, announced a new chip design principle called the Tau (τ) Scaling Law at a major industry conference in Shanghai. This approach shifts the focus from continuing traditional transistor miniaturization to improving the speed at which signals move within chips, proposing a fresh path for semiconductor development. The company revealed that it has been developing and implementing this principle for six years, with over 380 chip designs completed based on the concept.
To demonstrate this design philosophy, Huawei introduced the LogicFolding architecture, which reorganizes circuit layouts to reduce signal path length and electrical load, effectively speeding up signal transmission inside chips. The Kirin chips planned for release in autumn 2026 will be the first application of this technology, showcasing a practical step in Huawei’s effort to counteract the manufacturing limitations imposed by US sanctions that restrict access to advanced lithography tools.
Why it matters
For more than fifty years, the semiconductor industry has relied on transistor miniaturization as the primary driver of improved chip performance, known as Moore’s Law. However, increasingly complex manufacturing and US-imposed restrictions have challenged this traditional path. Huawei’s Tau Scaling Law proposes an alternative leveraging design innovation to enhance chip speed and effective transistor density without requiring the latest lithography equipment, which Chinese manufacturers currently cannot access due to export controls.
This development highlights China’s broader push for semiconductor self-reliance amid escalating geopolitical tensions. If successful, Huawei’s approach could allow Chinese chipmakers to bypass some constraints imposed by the US, potentially redefining competitive dynamics in the global semiconductor market. However, independent verification of Huawei’s performance claims remains pending, and industry experts will be watching closely to see if this method can deliver on its promises.
What to watch next
The immediate test of Huawei’s Tau Scaling Law will come with the release of its autumn 2026 Kirin chips using the LogicFolding architecture. These chips will provide concrete data on the practical performance benefits of focusing on signal-propagation time rather than transistor size. Market reception and independent benchmarks at that time will be critical in assessing the viability of Huawei’s new design philosophy.
Looking further ahead, Huawei projects it will develop chips with transistor densities matching a 1.4-nanometer process by 2031, a goal traditionally reliant on cutting-edge extreme ultraviolet lithography equipment. Since Chinese companies cannot legally acquire such tools, success in this area could mark a significant technological and geopolitical milestone for China’s semiconductor ambitions. Additionally, ongoing international legal and regulatory developments around export controls, including the proposed MATCH Act in the US, will shape the environment in which Huawei and the broader Chinese chip industry continue to operate.