He Tingbo, head of Huawei’s secretive semiconductor division and known as the ‘chip queen,’ emerged from years of obscurity to introduce the Tau Scaling Law at a major Shanghai symposium. This new approach could allow transistor densities matching 1.4nm technology by 2031 without relying on restricted EUV lithography, potentially redefining chip advancement amid ongoing US trade restrictions.
- Huawei’s Tau Scaling Law targets 1.4nm chip performance by 2031 without EUV lithography.
- The law prioritizes signal timing improvements over physical transistor size reduction.
- Huawei’s LogicFolding architecture redesigns chip internal layout, distinct from 3D stacking.
What happened
After seven years out of public view due to US sanctions blocking access to advanced semiconductor technology, He Tingbo returned to the spotlight in May 2026. At the IEEE International Symposium on Circuits and Systems held in Shanghai, she announced Huawei’s new “Tau Scaling Law,” which promises to achieve transistor densities equivalent to cutting-edge 1.4-nanometre processes by 2031 without relying on restricted extreme ultraviolet (EUV) lithography tools. This breakthrough raised significant attention among global semiconductor experts and sparked debate about its feasibility and impact.
The Tau Scaling Law shifts the traditional focus on geometric transistor scaling towards optimizing signal propagation delays within chips. Huawei introduced a proprietary chip architecture called LogicFolding that integrates circuit components with a unique 'small gear ratio' logic design rather than traditional 3D chip stacking methods. This innovation attempts to unify design and packaging strategies from chip manufacturing to push semiconductor performance beyond current physical limitations.
Why it matters
Huawei’s announcement comes amid growing efforts by China to reduce dependence on foreign semiconductor technology, especially in light of US-led export bans initiated in 2019 which severed Huawei’s access to critical global chipfoundries and advanced equipment. The company’s semiconductor division was forced to retreat into secrecy while developing alternative technological strategies. The Tau Scaling Law represents a potential paradigm shift that could redefine what constitutes ‘advanced’ chip performance by emphasizing time-based metrics rather than conventional transistor size reduction.
By pursuing this approach, Huawei aims to circumvent the limitations imposed by US sanctions, especially the unavailability of EUV lithography machinery essential for current leading-edge chip fabrication. The technology signals a bid for renewed competitiveness in semiconductor design and production and highlights innovative methods like Design-Technology Co-Optimisation and complex chip layout redesigns. However, industry analysts remain cautious about how these theoretical advances will translate into scalable manufacturing.
What to watch next
The coming years will reveal how viable Huawei’s Tau Scaling Law and LogicFolding architecture are outside academic demonstration. The semiconductor sector will closely monitor Huawei’s ability to translate these design principles into commercially manufacturable chips, especially under ongoing international trade restrictions. Observers will evaluate whether Huawei can overcome longstanding physical and economic challenges faced by the global chip industry as transistor sizes approach atomic limits.
Additionally, Huawei’s progress may influence broader Chinese semiconductor ambitions and global supply chains. Success could encourage similar innovation-driven approaches elsewhere, reshaping competitive dynamics. Meanwhile, geopolitical tensions surrounding semiconductor technology and US-China technology rivalry will remain a critical backdrop shaping Huawei’s opportunities and hurdles in pushing forward this new scaling doctrine.